Congrats to Yuta Nagahara on receiving the VLD Excellent Student Author Award for ASP-DAC 2024. Title: Sparse-Sparse Matrix Multiplication Accelerator on FPGA featuring Distribute-Merge Product Dataflow Congratulations!
Congrats to Junnosuke Suzuki on receiving the IEEE EDS Japan Joint Chapter Student Award (VLSI). Title: Pianissimo: A Sub-mW Class DNN Accelerator with Progressive Bit-by-Bit Datapath Architecture for Adaptive Inference at Edge Congratulations!
Congrats to Hikari Otsuka on receiving the Outstanding Presentation Award for his pre-midterm research proposal presentation from the Department of Information and Communications Engineering. Date: November 30, 2023 Title: Research on Pre-learning Pruning and Strong Lottery Hypothesis to Reduce Learning Cost of Neural Networks Congratulations!
Genta Inoue gave a poster presentation at the LSI & System Workshop, held in Takeda Hall, The University of Tokyo, Japan. (The presentation title is only in Japanese) He received the Best Poster Award!
Genta Inoue gave an oral presentation, and Jiale Yan gave a poster presentation at the IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 26, held in Takeda Hall, The University of Tokyo, Japan. Genta Inoue, “Flexibly Controllable Dynamic Cooling Methods for Solid-State Annealing Processors to Improve Combinatorial Read more…
Professor Motomura was awarded the 22nd Yamazaki-Teiichi Prize in the semiconductors and systems/information/electronics field by the MST Foundation for Promotion of Material Science and Technology of Japan. The title of the award is “Research, development, and commercialization of the dynamically reconfigurable processor technology and its application in the field of Read more…
Professor Motomura was awarded the 54th Ichimura Academic Award by the Ichimura Foundation for New Technology for his distinguished achievements and contributions to the development of science, technology, and industry in Japan. The theme of the award is “Pioneering research on structural information processing and its application in the field Read more…
At the 2022 International Solid-State Circuits Conference (ISSCC), Professor Motomura was awarded the IEEE Fellow status for his “contributions to memory-logic integration of reconfigurable chip architecture”. Congratulations!
Congrats to Yasuyuki Okoshi on receiving the Outstanding Presentation Award for his pre-midterm research proposal presentation from the Department of Information and Communications Engineering. Date: December 1, 2021 Title: Research on High-Precision and Lightweight HNN using Multi-Bit Masks Congratulations!
Our paper entitled “A High-Performance and Flexible FPGA Inference Accelerator for Decision Forests Based on Prior Feature Space Partitioning” received the best paper award at FPT 2021. Congratulations to Assistant Professor Thiem Van Chu! FPT 2021 (held virtually on 6th-10th December 2021)