Award
令和五年（2023）年度PRMU研究奨励賞
Congrats to Hikari Otsuka on receiving the 令和五年（2023）年度PRMU研究奨励賞. Title: 強い宝くじ仮説に基づく超軽量物体検出ニューラルネットワーク Congratulations!
Award
Excellent Student Award from the Department of Information and Communications Engineering
Congrats to Yuta Nagahara on receiving the excellent student award (FY2023) from the Department of Information and Communications Engineering, School of Engineering, Tokyo Institute of Technology. Congratulations!
Award
VLD Excellent Student Author Award for ASP-DAC 2024
Congrats to Yuta Nagahara on receiving the VLD Excellent Student Author Award for ASP-DAC 2024. Title: Sparse-Sparse Matrix Multiplication Accelerator on FPGA featuring Distribute-Merge Product Dataflow Congratulations!
Award
IEEE EDS Japan Joint Chapter Student Award (VLSI)
Congrats to Junnosuke Suzuki on receiving the IEEE EDS Japan Joint Chapter Student Award (VLSI). Title: Pianissimo: A Sub-mW Class DNN Accelerator with Progressive Bit-by-Bit Datapath Architecture for Adaptive Inference at Edge Congratulations!
Award
Outstanding Presentation Award from the Department of Information and Communications Engineering
Congrats to Hikari Otsuka on receiving the Outstanding Presentation Award for his pre-midterm research proposal presentation from the Department of Information and Communications Engineering. Date: November 30, 2023 Title: Research on Pre-learning Pruning and Strong Lottery Hypothesis to Reduce Learning Cost of Neural Networks Congratulations!
Award
Postar Presentation @ LSI & System Workshop
Genta Inoue gave a poster presentation at the LSI & System Workshop, held in Takeda Hall, The University of Tokyo, Japan. (The presentation title is only in Japanese) He received the Best Poster Award!
Award
Presentation@IEEE COOL Chips 26
Genta Inoue gave an oral presentation, and Jiale Yan gave a poster presentation at the IEEE Symposium on Low-Power and High-Speed Chips and Systems, COOL Chips 26, held in Takeda Hall, The University of Tokyo, Japan. Genta Inoue, “Flexibly Controllable Dynamic Cooling Methods for Solid-State Annealing Processors to Improve Combinatorial Read more…
Award
Professor Motomura receives the 22nd Yamazaki-Teiichi Prize
Professor Motomura was awarded the 22nd Yamazaki-Teiichi Prize in the semiconductors and systems/information/electronics field by the MST Foundation for Promotion of Material Science and Technology of Japan. The title of the award is “Research, development, and commercialization of the dynamically reconfigurable processor technology and its application in the field of Read more…
Award
Professor Motomura awarded the 54th Ichimura Academic Award
Professor Motomura was awarded the 54th Ichimura Academic Award by the Ichimura Foundation for New Technology for his distinguished achievements and contributions to the development of science, technology, and industry in Japan. The theme of the award is “Pioneering research on structural information processing and its application in the field Read more…
Award
Professor Motomura named IEEE Fellow
At the 2022 International Solid-State Circuits Conference (ISSCC), Professor Motomura was awarded the IEEE Fellow status for his “contributions to memory-logic integration of reconfigurable chip architecture”. Congratulations!