What’s New

One paper entitled “Sparse-Sparse Matrix Multiplication Accelerator on FPGA featuring Distribute-Merge Product Dataflow” has been accepted to ASP-DAC 2024. Our second-year master’s student Yuta Nagahara will give a presentation at the conference in January 22-25. Congratulations! ASP-DAC (held at South Read more…

One paper entitled “A Highly Accurate and Parallel Vision MLP FPGA Accelerator based on FP7/8 SIMD Operations” has been accepted to MCSoC 2023. Our second-year master’s student Mari Yasunaga will give a presentation at the conference in December 18-21. Congratulations! Read more…

Our first-year Master’s student Tsukasa Yamakura presented at Information-Based Induction Sciences and Machine Learning (IBISML) on June 29th, 2023. 表形式データを対象とした決定木とニューラルネットワークの融合型機械学習手法の研究

We gave the following oral presentation at the Symposium on VLSI Technology and Circuits 2023, held in Rihga Royal Hotel Kyoto, Japan, from June 11 to June 16, 2023. Junnosuke Suzuki, Jaehoon Yu, Mari Yasunaga, Ángel López García-Arias, Yasuyuki Okoshi, Read more…

Assistant Prof. Kawamura gave a presentation entitled “Amorphica: 4-Replica 512 Fully Connected Spin 336MHz Metamorphic Annealer with Programmable Optimization Strategy and Compressed-Spin-Transfer Multi-Chip Extension” in IEEE ISSCC 2023 held in San Francisco in the USA from Feb. 19th to 23rd. Read more…

Our first year Master’s student Mari Yasunaga and undergraduate student Akihiro Shioda gave presentations at SIG-FPAI on January 20, 2023. Mari Yasunaga: A Highly Accurate and Parallel NN FPGA Accelerator based on FP8 SIMD Operations Akihiro Shioda: Reinforcement Learning Method Read more…