384 entries « 2 of 8 »

2019

51.

Kasho Yamamoto, Masayuki Ikebe, Tetsuya Asai, Masato Motomura, Shinya Takamaeda-Yamazaki

FPGA-Based Annealing Processor with Time-Division Multiplexing Journal Article

In: IEICE Transactions on Information and Systems, E102 , 2019.

BibTeX | タグ: Journal Papers

52.

Kota Ando, Kodai Ueyoshi, Yuka Oba, Kazutoshi Hirose, Ryota Uematsu, Takumi Kudo, Masayuki Ikebe, Tetsuya Asai, Shinya Takamaeda-Yamazaki, Masato Motomura

Dither NN: Hardware/Algorithm Co-Design for Accurate Quantized Neural Networks Journal Article

In: IEICE Transactions on Information and Systems, E102 , 2019.

BibTeX | タグ: Journal Papers

53.

本村 真人

AIエッジコンピューティングへの希望と展望 Book

OKIテクニカルレビュー,「AIエッジコンピューティングが拓く高度IoT社会」特集,第234号, 2019.

BibTeX | タグ: Books

54.

Yuki Hirayama, Tetsuya Asai, Masato Motomura, Shinya Takamaeda-Yamazaki

A Resource-Efficient Weight Sampling Method for Bayesian Neural Networks Accelerators Inproceedings

In: International Symposium on Computing and Networking (CANDAR), 2019.

BibTeX | タグ: Conference Papers

55.

Masato Motomura

[Tutorial] AI Computing: What it is about & How hardware can help it out Presentation

Asian Solid-State Circuit Conference (A-SSCC), Macau, SAR, China, 14.11.2019.

BibTeX | タグ: Invited Talks

56.

Toranosuke Tanio, Kouya Takeda, Jaehoon Yu, Masanori Hashimoto

Training Data Reduction using Support Vectors for Neural Networks Inproceedings

In: Asia-Pacific Signal and Information Processing Association (APSIPA), 2019.

BibTeX | タグ: Conference Papers

57.

Shota Fukui, Jaehoon Yu, Masanori Hashimoto

Distilling Knowledge for Non-Neural Networks Inproceedings

In: Asia-Pacific Signal and Information Processing Association (APSIPA), 2019.

BibTeX | タグ: Conference Papers

58.

本村 真人

[Invited] AIチップ: 世界の研究動向と東工大の研究戦略 Presentation

科学技術創成研究院公開,東工大すずかけ台キャンパス,横浜, 10.10.2019.

BibTeX | タグ: Invited Talks

59.

Tatsuya Kaneko, Kentaro Orimo, Itaru Hida, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Masato Motomura, Tetsuya Asai

A Study on a Low Power Optimization Algorithm for An Edge-AI Device Journal Article

In: Nonlinear Theory and Its Applications, E10-N (4), 2019.

BibTeX | タグ: Journal Papers

60.

本村 真人

[Invited] AI関連半導体技術の動向 Presentation

HAB研セミナー,京都テルサ,京都, 30.08.2019.

BibTeX | タグ: Invited Talks

61.

本村 真人

[Invited] AIチップの世界動向と日本がとるべき戦略 Presentation

EPFCシンポジウム,川崎ソリッドスクエア,川崎, 04.07.2019.

BibTeX | タグ: Invited Talks

62.

Yuka Oba, Kota Ando, Tetsuya Asai, Masato Motomura, Shinya Takamaeda-Yamazaki

DeltaNet: Differential Binary Neural Network Inproceedings

In: IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), New York, USA, 2019.

BibTeX | タグ: Conference Papers

63.

Tatsuya Kaneko, Masayuki Ikebe, Shinya Takamaeda-Yamazaki, Masato Motomura, Tetsuya Asai

Hardware-Oriented Algorithm and Architecture for Generative Adversarial Networks Journal Article

In: Journal of Signal Processing, 23 (4), pp. 151-154, 2019.

BibTeX | タグ: Journal Papers

64.

平山 侑樹, 浅井 哲也, 本村 真人, 高前田 伸也

決定論的変分推論に基づくベイジアンCNNの検討 Incollection

In: 人工知能学会 - 2019年度研究会優秀賞, 2019.

BibTeX | タグ: Awards

65.

池田 泰我, 植吉 晃大, 安藤 洸太, 廣瀨 一俊, 浅井 哲也, 本村 真人, 高前田 伸也

効率的なDNN計算のための無効ニューロン予測手法の評価 Incollection

In: 電子情報通信学会 DC研究会 - 若手優秀講演賞, 2019.

BibTeX | タグ: Awards

66.

Tatsuya Kaneko, Masayuki Ikebe, Shinya Takamaeda-Yamazaki, Masato Motomura, Tetsuya Asai

Hardware-Oriented Algorithm and Architecture for Generative Adversarial Networks Inproceedings

In: RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, Honolulu, USA, 2019.

BibTeX | タグ: Conference Papers

67.

Shunya Suzuki, Seunggoo Rim, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Masato Motomura, Tetsuya Asai

Experimental Demonstration of Physical Reservoir Computing with Nonlinear Electronic Devices Inproceedings

In: RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, Honolulu, USA, 2019.

BibTeX | タグ: Conference Papers

68.

Koyo Minamikawa, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Masato Motomura, Tetsuya Asai

FPGA-Based FORCE Learning Accelerator towards Real-Time Online Reservoir Computing Inproceedings

In: RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing, Honolulu, USA, 2019.

BibTeX | タグ: Conference Papers

69.

Masato Motomura

[Invited] AI Computing: The Promised Land for Hardware? Presentation

Multimedia Workshop, Tokyo, Japan, 01.03.2019.

BibTeX | タグ: Invited Talks

70.

Masato Motomura

[Invited] Intelligence at the Edge: Frontiers for Energy-Efficient Hardware Architectures Presentation

Riken International Workshop on Neuromorphic Computing (R-WoNC), Kobe, Japan, 01.03.2019.

BibTeX | タグ: Invited Talks

71.

本村 真人

コンピューティングアーキテクチャ Book

JST CRDS 研究開発の俯瞰報告書 2019年版, 2019.

BibTeX | タグ: Books

72.

Tatsuya Kaneko, Masayuki Ikebe, Shinya Takamaeda-Yamazaki, Masato Motomura, Tetsuya Asai

Ternarized Backpropagation: A Hardware-Oriented Optimization Algorithm for Edge-Oriented AI Devices Inproceedings

In: RIEC International Symposium on Brain Functions and Brain Computer, Sendai, Japan, 2019.

BibTeX | タグ: Conference Papers

73.

Seunggoo Rim, Shunya Suzuki, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Masato Motomura, Tetsuya Asai

Approach to Reservoir Computing with Schmitt Trigger Oscillator-Based Analog Neural Circuits Inproceedings

In: Japan-Korea Joint Workshop on Complex Communication Sciences, Pyengonchang, Korea, 2019.

BibTeX | タグ: Conference Papers

74.

Ryutaro Doi, Jaehoon Yu, Masanori Hashimoto

Sneak Path Free Reconfiguration with Minimized Programming Steps for Via-switch Crossbar Based FPGA Journal Article

In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp. 1-1, 2019, ISSN: 1937-4151.

BibTeX | タグ: Journal Papers

75.

Thiem Van Chu, Kenji Kise

LEF: An Effective Routing Algorithm for Two-Dimensional Meshes Journal Article

In: IEICE Transactions on Information and Systems, E102-D (10), pp. 1925–1941, 2019.

BibTeX | タグ: Journal Papers

76.

Salita Sombatsiri, Seiya Shibata, Yuki Kobayashi, Hiroaki Inoue, Takashi Takenaka, Takeo Hosomi, Jaehoon Yu, Yoshinori Takeuchi

Parallelism-Flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA Journal Article

In: 12 , pp. 22–37, 2019.

BibTeX | タグ: Journal Papers

77.

Tai-Yu Cheng, Jaehoon Yu, Masanori Hashimoto

Minimizing Energy for Neural Network Training with Logarithm-Approximate Floating-Point Multiplier Inproceedings

In: International Symposium on Power and Timing Modeling, Optimization and Simulation, pp. 91–96, 2019.

BibTeX | タグ:

78.

Kodai Ueyoshi, Kota Ando, Kazutoshi Hirose, Shinya Takamaeda-Yamazaki, Mototsugu Hamada, Tadahiro Kuroda, Masato Motomura

QUEST: Multi-Purpose Log-Quantized DNN Inference Engine Stacked on 96-MB 3-D SRAM Using Inductive Coupling Technology in 40-nm CMOS Journal Article

In: IEEE Journal of Solid-State Circuits, 54 (1), pp. 186-196, 2019.

BibTeX | タグ: Journal Papers

79.

本村 真人

深層学習プロセッサの展望 Book

映像メディア学会誌「データ科学を支えるアクセラレーション技術」特集, 2019.

BibTeX | タグ: Books

80.

金子 竜也, 高前田 伸也, 本村 真人, 浅井 哲也

オンライン学習を行う階層型ニューラルネットワークハードウェアの低電力化に向けた三値バックプロパゲーション法の提案 Inproceedings

In: LSIとシステムのワークショップ2019, 東京, 2019.

BibTeX | タグ: Conference Papers

81.

本村 真人

[Invited] 2030年のリコンフィギュラブルシステム Presentation

Jacorn, 01.12.2018.

BibTeX | タグ: Invited Talks

82.

本村 真人

[Invited] AIハードウェアの必要性と期待 ~ 世界的大競争の中で ~ Presentation

AIチップ設計拠点設立記念シンポジウム, 01.12.2018.

BibTeX | タグ: Invited Talks

2018

83.

Kota Ando, Kodai Ueyoshi, Yuka Oba, Kazutoshi Hirose, Ryota Uematsu, Takumi Kudo, Masayuki Ikebe, Tetsuya Asai, Shinya Takamaeda-Yamazaki, Masato Motomura

Dither NN: An Accurate Neural Network with Dithering for Low Bit-Precision Hardware Inproceedings

In: International Conference on Field-Programmable Technology (FPT), Naha, Japan, 2018.

BibTeX | タグ: Conference Papers

84.

Prasoon Ambalathankandy, Takeshi Shimada, Shinya Takamaeda-Yamazaki, Masato Motomura, Tetsuya Asai, Masayuki Ikebe

Analysis of Smoothed LHE Methods for Processing Images with Optical Illusions Inproceedings

In: IEEE International Conference on Visual Communications and Image Processing, Taichung, Taiwan, 2018.

BibTeX | タグ: Conference Papers

85.

Prasoon Ambalathankandy, Shinya Takamaeda-Yamazaki, Masato Motomura, Tetsuya Asai, Masayuki Ikebe, Hotaka Kusano

Real-time HDTV to 4K and 8K-UHD Conversions Using Anti-Aliasing Based Super Resolution Algorithm on FPGA Journal Article

In: Microprocessors and Microsystems, 60 , 2018.

BibTeX | タグ: Journal Papers

86.

Masato Motomura

[Invited] Structure-Oriented Computing: Where Software Redefines Hardware Architecture Presentation

Future Chips Forum, Beijing, China, 01.12.2018.

BibTeX | タグ: Invited Talks

87.

Masato Motomura

[Invited] Intelligence at the Edge: Frontiers for Energy-Efficient Hardware Architectures Presentation

International IoT Solid-State Circuits Workshop, Hshinchu, Taiwan, 01.11.2018.

BibTeX | タグ: Invited Talks

88.

Tatsuya Kaneko, Masayuki Ikebe, Shinya Takamaeda-Yamazaki, Masato Motomura, Tetsuya Asai

A Study on Ternary Back Propagation Algorithm for Embedded Egde-AI Processing Inproceedings

In: Joint Workshop of UCL-ICN, NTT, UCL-Gatsby and AIBS: Analysis and Synthesis for Human/Artificial Cognition and Behaviour, Okinawa, Japan, 2018.

BibTeX | タグ: Conference Papers

89.

Kazutoshi Hirose, Ryota Uematsu, Kota Ando, Kodai Ueyoshi, Masayuki Ikebe, Tetsuya Asai, Masato Motomura, Shinya Takamaeda-Yamazaki

Quantization Error-Based Regularization for Hardware-Aware Neural Network Training Journal Article

In: Nonlinear Theory and Its Applications, E9-N (4), pp. 453-465, 2018.

BibTeX | タグ: Journal Papers

90.

Takumi Kudo, Kodai Ueyoshi, Kota Ando, Kazutoshi Hirose, Ryota Uematsu, Yuka Oba, Masayuki Ikebe, Tetsuya Asai, Masato Motomura, Shinya Takamaeda-Yamazaki

Area and Energy Optimization for Bit-Serial Log-Quantized DNN Accelerator with Shared Accumulators Inproceedings

In: IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, Hanoi, Vietnam, 2018.

BibTeX | タグ: Conference Papers

91.

Masanori Hashimoto, Yuki Nakazawa, Jaehoon Yu

Interconnect Delay Analysis for RRAM Crossbar Based FPGA Inproceedings

In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 522-527, 2018.

BibTeX | タグ: Conference Papers

92.

Taro Fujii, Takao Toi, Teruhito Tanaka, Katsumi Togawa, Toshiro Kitaoka, Kengo Nishino, Noritsugu Nakamura, Hiroki Nakahara, Masato Motomura

New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications Inproceedings

In: Symposia on VLSI Technology and Circuits, Hawaii, USA, 2018.

BibTeX | タグ: Conference Papers

93.

Masato Motomura

[Invited] Hardware-Oriented Approaches for Accelerating “AI” Workloads Presentation

Symposium on VLSI Circuits, Short Course, Hololulu, USA, 01.06.2018.

BibTeX | タグ: Invited Talks

94.

Takeshi Shimada, Masayuki Ikebe, Prasoon Ambalathankandy, Shinya Takamaeda-Yamazaki, Masato Motomura, Tetsuya Asai

Sparse Disparity Estimation Using Global Phase Only Correlation for Stereo Matching Acceleration Inproceedings

In: IEEE International Conference on Acoustics, Speech and Signal Processing, Alberta, Canada, 2018.

BibTeX | タグ: Conference Papers

95.

Kota Ando, Kodai Ueyoshi, Kentaro Orimo, Haruyoshi Yonekawa, Shimpei Sato, Hiroki Nakahara, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Tetsuya Asai, Tadahiro Kuroda, Masato Motomura

BRein Memory: A Single-Chip Binary/Ternary Reconfigurable In-Memory Deep Neural Network Accelerator Achieving 1.4TOPS at 0.6W Journal Article

In: IEEE Journal of Solid-State Circuits, 53 (4), pp. 983-994, 2018.

BibTeX | タグ: Journal Papers

96.

Ryota Uematsu, Kota Ando, Kodai Ueyoshi, Kazutoshi Hirose, Masayuki Ikebe, Tetsuya Asai, Shinya Takamaeda-Yamazaki, Masato Motomura

Exploring CNN Accelerator Design Space on a Dynamically Reconfigurable Hardware Platform Inproceedings

In: Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI), Matsue, Japan, 2018.

BibTeX | タグ: Conference Papers

97.

Naoto Iwamaru, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Masato Motomura, Tetsuya Asai

A Novel Iris-Center Detection Algorithm towards Gaze Estimation Targeting Molecular Cellular Automata Inproceedings

In: International Workshop on Molecular Architectonics, Osaka, Japan, 2018.

BibTeX | タグ: Conference Papers

98.

Kodai Ueyoshi, Kota Ando, Kazutoshi Hirose, Shinya Takamaeda-Yamazaki, Junichiro Kadomoto, Tomoki Miyata, Mototsugu Hamada, Tadahiro Kuroda, Masato Motomura

QUEST: A 7.49-TOPS Multi-Purpose Log-Quantized DNN Inference Engine Stacked on 96MB 3D SRAM using Inductive-Coupling Technology in 40nm CMOS Inproceedings

In: International Solid-State Circuits Conference (ISSCC 2018), San Francisco, US, 2018.

BibTeX | タグ: Conference Papers

99.

Aoi Tanibata, Alexandre Schmid, Shinya Takamaeda-Yamazaki, Masayuki Ikebe, Masato Motomura, Tetsuya Asai

Proto-Computing Architecture over A Digital Medium Aiming at Real-Time Video Processing Journal Article

In: Complexity, 2018 , pp. 3618621-1-11, 2018.

BibTeX | タグ: Journal Papers

100.

Tomoki Sugiura, Jaehoon Yu, Yoshinori Takeuchi

Phase Locking Value Calculator based on Hardware-oriented Mathematical Expression Journal Article

In: 101 (12), pp. 2254–2261, 2018.

BibTeX | タグ: Journal Papers

384 entries « 2 of 8 »