The paper entitled “STATICA: A 512-Spin 0.25M-Weight Annealing Processor with an All-Spin-Updates-at-Once Architecture for Combinatorial Optimization with Complete Spin-Spin Interactions” has been accepted for publication in the IEEE Journal of Solid State Circuits (IEEE JSSC).
Mainichi morning newspaper reported the STATICA that presented in ISSCC February. https://mainichi.jp/articles/20200611/ddm/016/040/012000c?fbclid=IwAR3-MO9mj4nGu1LW2TjsnRariRYYLcCHAtNBamRdTllruNOAMSsRoz3EDB8 Also, multiple newspapers, including Nikkei morning newspaper February 17th, reported the STATICA. https://www.nikkei.com/article/DGKKZO55634490U0A210C2TJM000/?fbclid=IwAR3PlOmv-OAxvKcVmPaEgWBCmRRLyg41hricmQQy2L3V_cSiklNTpWEonYA https://eetimes.jp/ee/articles/2002/20/news035.html
The following 8 students newly joined ArtIC. Kazutoshi Hirose (D2) Kaisei Okawa (M1) Shungo Kumazawa (M1) Junnosuke Suzuki (M1) Yasuyuki Okoshi (B4) Tomohiro Kaneko (B4) Ryuichi Kitajima (B4) Iriya Takayama (B4)
Specially appointed assistant prof. Kawamura joined ArtIC on Apr. 1st, 2020.
The site visit of CREST (Technology for Computing Revolution for Society 5.0) is held in Hokkaido university on Nov. 20th.
STATICA is accepted to the Olympic of integrated circuits, ISSCC, which is a solution engine (annealing processor) for optimization problems, researched and developed by ArtIC members. It will be presented in SanFrancisco on Feb. 18th, 2020. Link: 機械学習のセッションができたISSCC 2020 (Japanese) Link: ISSCC2020東京記者会見資料より (Japanese)
Artificial Computing Research Unit (ArtIC) based on Professor Motomura is inaugurated for the purpose of information processing hardware innovation.