AI Computing Research Unit
  • Top
  • YouTube
  • Prospective Students
  • What’s New
  • MEMBER
  • Research
    • For Establishment of Structure-Oriented Computing Framework
    • Annealing Processor
    • Deep Neural Network Accelerator
    • Ensemble Learning Accelerator
    • Image-based Object Recognition
    • FPGA Based Deep Neural Network
    • Hardware-aware algorithm for Neural Networks
    • In-Storage Computing
  • Publications
  • Lab Life
  • Access
  • Link
  •  Lang: English
    •  日本語 日本語
    •  English English

December 5, 2019

Recent Posts
  • (日本語) ICML 2025 TTODLer-FM Workshop に採択されました Monday July 28th, 2025
  • (日本語) キオクシア奨励研究 優秀研究賞を受賞しました Monday July 28th, 2025
  • (日本語) ICML 2025 HiLD Workshop に採択されました Monday July 28th, 2025
Event

Research Plan Presentation of Information and Communications Engineering@Tokyo Tech

Mr. Ando gave a poster presentation entitled “Research of Memory-Centric Neural Network Processor using Data Flow Reconfiguration” in research plan presentation for master’s and doctoral course of graduate major in Information and Communications Engineering on Dec 4th 2019.

By admin, 6 years2019年12月5日 ago
  • 日本語 (ja)日本語
  • English (en)English

  • Top
  • YouTube
  • Prospective Students
  • What’s New
  • MEMBER
  • Research
  • Publications
  • Lab Life
  • Access
  • Link
  • Lang: English
Hestia | Developed by ThemeIsle