研究業績

@inproceedings{motomura_00062,

title = {New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications},

author = {Taro Fujii and Takao Toi and Teruhito Tanaka and Katsumi Togawa and Toshiro Kitaoka and Kengo Nishino and Noritsugu Nakamura and Hiroki Nakahara and Masato Motomura},

year  = {2018},

date = {2018-06-01},

booktitle = {Symposia on VLSI Technology and Circuits},

address = {Hawaii, USA},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00071,

title = {Sparse Disparity Estimation Using Global Phase Only Correlation for Stereo Matching Acceleration},

author = {Takeshi Shimada and Masayuki Ikebe and Prasoon Ambalathankandy and Shinya Takamaeda-Yamazaki and Masato Motomura and Tetsuya Asai},

year  = {2018},

date = {2018-04-01},

booktitle = {IEEE International Conference on Acoustics, Speech and Signal Processing},

address = {Alberta, Canada},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00072,

title = {Exploring CNN Accelerator Design Space on a Dynamically Reconfigurable Hardware Platform},

author = {Ryota Uematsu and Kota Ando and Kodai Ueyoshi and Kazutoshi Hirose and Masayuki Ikebe and Tetsuya Asai and Shinya Takamaeda-Yamazaki and Masato Motomura},

year  = {2018},

date = {2018-03-01},

booktitle = {Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI)},

address = {Matsue, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00074,

title = {A Novel Iris-Center Detection Algorithm towards Gaze Estimation Targeting Molecular Cellular Automata},

author = {Naoto Iwamaru and Shinya Takamaeda-Yamazaki and Masayuki Ikebe and Masato Motomura and Tetsuya Asai},

year  = {2018},

date = {2018-03-01},

booktitle = {International Workshop on Molecular Architectonics},

address = {Osaka, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00076,

title = {QUEST: A 7.49-TOPS Multi-Purpose Log-Quantized DNN Inference Engine Stacked on 96MB 3D SRAM using Inductive-Coupling Technology in 40nm CMOS},

author = {Kodai Ueyoshi and Kota Ando and Kazutoshi Hirose and Shinya Takamaeda-Yamazaki and Junichiro Kadomoto and Tomoki Miyata and Mototsugu Hamada and Tadahiro Kuroda and Masato Motomura},

year  = {2018},

date = {2018-02-01},

booktitle = {International Solid-State Circuits Conference (ISSCC 2018)},

address = {San Francisco, US},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{土井龍太郎2018ビアスイッチ,

title = {ビアスイッチ FPGA 再構成時のスニークパス問題を回避するプログラミング順決定手法},

author = {土井龍太郎 and 劉載勲 and 橋本昌宜 and others},

year  = {2018},

date = {2018-01-01},

booktitle = {DA シンポジウム 2018 論文集},

volume = {2018},

pages = {3--8},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{mitsunari2018hardware-asscc,

title = {Hardware Architecture for Fast General Object Detection Using Aggregated Channel Features},

author = {Koichi Mitsunari and Jaehoon Yu and Masanori Hashimoto},

year  = {2018},

date = {2018-01-01},

pages = {55-58},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{doi2018sneak,

title = {Sneak Path Free Reconfiguration of Via-switch Crossbars Based FPGA},

author = {Ryutaro Doi and Jaehoon Yu and Masanori Hashimoto},

year  = {2018},

date = {2018-01-01},

pages = {68:1--68:8},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ito2018adapting,

title = {Adapting Soft Cascade to MAC Operations of Convolutional Neural Networks},

author = {Kenshi Ito and Jaehoon Yu and Masanori Hashimoto},

year  = {2018},

date = {2018-01-01},

booktitle = {International Symposium on Multimedia and Communication Technology},

pages = {101--104},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{hashimoto2018interconnect,

title = {Interconnect Delay Analysis for RRAM Crossbar Based FPGA},

author = {Masanori Hashimoto and Yuki Nakazawa and Ryutaro Doi and Jaehoon Yu},

year  = {2018},

date = {2018-01-01},

pages = {522--527},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{中澤祐希2018ビアスイッチ,

title = {ビアスイッチ FPGA 向け配線解析手法の検討 (VLSI 設計技術)},

author = {中澤祐希 and 土井龍太郎 and 劉載勲 and 橋本昌宜},

year  = {2018},

date = {2018-01-01},

booktitle = {電子情報通信学会技術研究報告= IEICE technical report: 信学技報},

volume = {117},

number = {455},

pages = {187--192},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ando_00015,

title = {Accelerating Deep Learning by Binarized Hardware},

author = {Shinya Takamaeda-Yamazaki and Kodai Ueyoshi and Kota Ando and Ryota Uematsu and Kazutoshi Hirose and Masayuki Ikebe and Tetsuya Asai and Masato Motomura},

year  = {2017},

date = {2017-12-01},

booktitle = {Asia-Pacific Signal and Information Processing Association Annual Summit and Conference (APSIPA ASC)},

address = {Kuala Lumpur, Malaysia},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ando_00016,

title = {Quantization Error-based Regularization in Neural Networks},

author = {Kazutoshi Hirose and Kota Ando and Kodai Ueyoshi and Masayuki Ikebe and Tetsuya Asai and Masato Motomura and Shinya Takamaeda-Yamazaki},

year  = {2017},

date = {2017-12-01},

booktitle = {SGAI International Conference on Artificial Intelligence (SGAI)},

address = {Cambridge, England},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00082,

title = {Sign-Invariant Unsupervised Learning Facilitates Weighted-Sum Computation in Analog Neural-Network Devices},

author = {Itaru Hida and Kodai Ueyoshi and Shinya Takamaeda-Yamazaki and Masayuki Ikebe and Masato Motomura and Tetsuya Asai},

year  = {2017},

date = {2017-12-01},

booktitle = {International Symposium on Nonlinear Theory and Its Applications},

address = {Cancun, Mexico},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ando_00017,

title = {Logarithmic Compression for Memory Footprint Reduction in Neural Network Training},

author = {Kazutoshi Hirose and Ryota Uematsu and Kota Ando and Kentaro Orimo and Kodai Ueyoshi and Masayuki Ikebe and Tetsuya Asai and Shinya Takamaeda-Yamazaki and Masato Motomura},

year  = {2017},

date = {2017-11-01},

booktitle = {International Workshop on Computer Systems and Architectures (CSA)},

address = {Aomori, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ando_00018,

title = {A Regularization Approach for Quantized Neural Networks},

author = {Kazutoshi Hirose and Ryota Uematsu and Kota Ando and Kodai Ueyoshi and Masayuki Ikebe and Tetsuya Asai and Masato Motomura and Shinya Takamaeda-Yamazaki},

year  = {2017},

date = {2017-10-01},

booktitle = {International Workshop on Highly Efficient Neural Networks Design (HENND)},

address = {Seoul, Korea},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00091,

title = {FPGA Implementation of Edge-Guided Pattern Generation for Motion-Vector Estimation of Textureless Objects (Demo Night)},

author = {Aoi Tanibata and Alexandre Schmid and Shinya Takamaeda-Yamazaki and Masayuki Ikebe and Masato Motomura and Tetsuya Asai},

year  = {2017},

date = {2017-09-01},

booktitle = {International Conference on Field-Programmable Logic and Applications (FPL)},

address = {Ghent, Belgium},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ando_00020,

title = {In-Memory Area-Efficient Signal Streaming Processor Design for Binary Neural Networks},

author = {Kota Ando and Kodai Ueyoshi and Kazutoshi Hirose and Kentaro Orimo and Haruyoshi Yonekawa and Shimpei Sato and Hiroki Nakahara and Masayuki Ikebe and Shinya Takamaeda-Yamazaki and Tetsuya Asai and Tadahiro Kuroda and Masato Motomura},

year  = {2017},

date = {2017-08-01},

booktitle = {IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)},

address = {Boston, USA},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00102,

title = {Hardware Accelerator Design for Convolutional Neural Networks with Low Bit Precision},

author = {Kodai Ueyoshi and Masayuki Ikebe and Tetsuya Asai and Shinya Takamaeda-Yamazaki and Masato Motomura},

year  = {2017},

date = {2017-07-01},

booktitle = {GI-CoRE GSQ, GSB, & IGM Joint Symposium - Quantum, Informatics, Biology, & Medicine -},

address = {Sapporo, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00103,

title = {A Versatile and Energy-Efficient Reconfigurable Accelerator for Embedded Microprocessors},

author = {Itaru Hida and Shinya Takamaeda-Yamazaki and Masayuki Ikebe and Masato Motomura and Tetsuya Asai},

year  = {2017},

date = {2017-07-01},

booktitle = {GI-CoRE GSQ, GSB, & IGM Joint Symposium -Quantum, Informatics, Biology, & Medicine -},

address = {Sapporo, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00104,

title = {Time-Division Multiplexing},

author = {Kasho Yamamoto and Masayuki Ikebe and Tetsuya Asai and Masato Motomura and Shinya Takamaeda-Yamazaki},

year  = {2017},

date = {2017-07-01},

booktitle = {GI-CoRE GSQ, GSB, & IGM Joint Symposium - Quantum, Informatics, Biology, & Medicine -},

address = {Sapporo, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ando_00022,

title = {BRein Memory: A 13-Layer 4.2 K Neuron/0.8 M Synapse Binary/Ternary Reconfigurable In-Memory Deep Neural Network Accelerator in 65 nm CMOS},

author = {Kota Ando and Kodai Ueyoshi and Kentaro Orimo and Haruyoshi Yonekawa and Shimpei Sato and Hiroki Nakahara and Masayuki Ikebe and Tetsuya Asai and Shinya Takamaeda-Yamazaki and Tadahiro Kuroda and Masato Motomura},

year  = {2017},

date = {2017-06-01},

booktitle = {Symposia on VLSI Technology and Circuits},

address = {Kyoto, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00108,

title = {A Time-Division Multiplexing Ising Machine on FPGAs},

author = {Kasho Yamamoto and Weiqiang Huang and Shinya Takamaeda-Yamazaki and Masayuki Ikebe and Tetsuya Asai and Masato Motomura},

year  = {2017},

date = {2017-06-01},

booktitle = {International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART)},

address = {Bochum, Germany},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ando_00027,

title = {Exploring Optimized Accelerator Design for Binarized Convolutional Neural Networks},

author = {Kodai Ueyoshi and Kota Ando and Kentaro Orimo and Masayuki Ikebe and Tetsuya Asai and Masato Motomura},

year  = {2017},

date = {2017-05-01},

booktitle = {International Joint Conference on Neural Networks},

address = {Alaska, USA},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00110,

title = {Feature Extraction System Using Restricted Boltzmann Machines on FPGA},

author = {Kodai Ueyoshi and Takao Marukame and Tetsuya Asai and Masato Motomura and Alexandre Schmid},

year  = {2017},

date = {2017-05-01},

booktitle = {IEEE International Symposium on Circuits & Systems},

address = {Baltimore, USA},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00122,

title = {A Scalable Ising Model Implementation on An FPGA},

author = {Kasho Yamamoto and Shinya Takamaeda-Yamazaki and Masayuki Ikebe and Tetsuya Asai and Masato Motomura},

year  = {2017},

date = {2017-04-01},

booktitle = {COOL Chips},

address = {Yokohama, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00124,

title = {An FPGA Realization of a Deep Convolutional Neural Network Using A Threshold Neuron Pruning},

author = {Tomoya Fujii and Shimpei Sato and Hiroki Nakahara and Masato Motomura},

year  = {2017},

date = {2017-04-01},

booktitle = {International Symposium on Applied Reconfigurable Computing (ARC)},

address = {Delft, Netherlands},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00127,

title = {Low latency divider using ensemble of moving average curves},

author = {Yuhan Fu and Masayuki Ikebe and Takeshi Shimada and Masato Motomura and Tetsuya Asai},

year  = {2017},

date = {2017-03-01},

booktitle = {International Symposium on Quality Electronic Design (ISQED)},

address = {Santa Clara, USA},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00132,

title = {A Batch Normalization Free Binarized Convolutional Deep Neural Network on an FPGA},

author = {Hiroki Nakahara and Haruyoshi Yonekawa and Hisashi Iwamoto and Masato Motomura},

year  = {2017},

date = {2017-02-01},

booktitle = {International Symposium on Field-Programmable Gate Array (FPGA)},

address = {California, USA},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ando_00028,

title = {Throughput Analysis of A Data-Flow Reconfigurable Array Architecture for Convolutional Neural Networks},

author = {Kota Ando and Kodai Ueyoshi and Kentaro Orimo and Masayuki Ikebe and Shinya Takamaeda-Yamazaki and Tetsuya Asai and Masato Motomura},

year  = {2017},

date = {2017-02-01},

booktitle = {RIEC International Symposium on Brain Functions and Brain Computer},

address = {Sendai, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00130,

title = {6-DoF Camera-Position and Posture Estimation Based on Local Patches of Image Sequence},

author = {Takuto Tsuji and Masayuki Ikebe and Shinya Takamaeda-Yamazaki and Masato Motomura and Tetsuya Asai},

year  = {2017},

date = {2017-02-01},

booktitle = {RISP International Workshop on Nonlinear Circuits, Communications and Signal Processing},

address = {Guam, USA},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{thiem-fccm2017,

title = {High-Performance Hardware Merge Sorter},

author = {Susumu Mashimo and Thiem Van Chu and Kenji Kise},

year  = {2017},

date = {2017-01-01},

booktitle = {IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM)},

pages = {1--8},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{sugiura2017hardware,

title = {Hardware-Oriented Algorithm for Phase Synchronization Analysis of Biomedical Signals},

author = {Tomoki Sugiura and Jaehoon Yu and Yoshinori Takeuchi},

year  = {2017},

date = {2017-01-01},

booktitle = {IEEE_C_BCAS},

pages = {1--4},

note = {(被引用件数: 1)},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00142,

title = {A Memory-Based Realization of A Binarized Deep Convolutional Neural Network},

author = {Hiroki Nakahara and Haruyoshi Yonekawa and Tsutomu Sasao and Hisashi Iwamoto and Masato Motomura},

year  = {2016},

date = {2016-12-01},

booktitle = {International Conference on Field-Programmable Technology (FPT)},

address = {Xi'an, China},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00143,

title = {An FPGA-Optimized Architecture of Anti-Aliasing Based Super Resolution for Real-time HDTV to 4K- and 8K-UHD Conversions},

author = {Hotaka Kusano and Masayuki Ikebe and Tetsuya Asai and Masato Motomura},

year  = {2016},

date = {2016-11-01},

booktitle = {International Conference on Reconfigurable Computing and FPGAs},

address = {Cancun, Mexico},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00145,

title = {A Hardware Cellular-Automaton Architecture for Spatial Pattern Generation towards Motion-Vector Estimation of Textureless Objects},

author = {Aoi Tanibata and Miho Ushida and Alexandre Schmid and Masayuki Ikebe and Tetsuya Asai and Masato Motomura},

year  = {2016},

date = {2016-11-01},

booktitle = {International Symposium on Nonlinear Theory and its Applications},

address = {Shizuoka, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00146,

title = {[Invited] 3D Stacked Image Sensor Featuring Low Noise Inductive Coupling Channels},

author = {Masayuki Ikebe and Daisuke Uchida and Yasuhiro Take and Tetsuya Asai and Tadahiro Kuroda and Masato Motomura},

year  = {2016},

date = {2016-11-01},

booktitle = {International Workshop on Image Sensors and Imaging Systems},

address = {Tokyo, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ando_00029,

title = {FPGA Architecture for Feed-Forward Sequential Memory Network Targeting Long-Term Time-Series Forecasting},

author = {Kentaro Orimo and Kota Ando and Kodai Ueyoshi and Masayuki Ikebe and Tetsuya Asai and Masato Motomura},

year  = {2016},

date = {2016-11-01},

booktitle = {International Conference on Reconfigurable Computing and FPGAs},

address = {Cancun, Mexico},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{ando_00030,

title = {Reconfigurable Processor Array Architecture for Deep Convolutional Neural Networks},

author = {Kota Ando and Kentaro Orimo and Kodai Ueyoshi and Masayuki Ikebe and Tetsuya Asai and Masato Motomura},

year  = {2016},

date = {2016-10-01},

booktitle = {Workshop on Synthesis And System Integration of Mixed Information Technologies},

address = {Kyoto, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00149,

title = {A Two-Clock-Cycle Naive Bayes Classifier for Dynamic Branch Prediction in Pipelined RISC Microprocessors},

author = {Itaru Hida and Masayuki Ikebe and Tetsuya Asai and Masato Motomura},

year  = {2016},

date = {2016-10-01},

booktitle = {IEEE Asia Pacific Conference on Circuits and Systems},

address = {Jeju, Korea},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00150,

title = {Reconfigurable Processor Array Architecture for Deep Convolutional Neural Networks},

author = {Kota Ando and Kentaro Orimo and Kodai Ueyoshi and Masayuki Ikebe and Tetsuya Asai and Masato Motomura},

year  = {2016},

date = {2016-10-01},

booktitle = {Workshop on Synthesis And System Integration of Mixed Information Technologies},

address = {Kyoto, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00158,

title = {Motion-Vector Estimation and Cognitive Classification on An Image Sensor/Processor 3D Stacked System Featuring ThruChip Interfaces},

author = {Tetsuya Asai and Masafumi Mori and Toshiyuki Itou and Yasuhiro Take and Masayuki Ikebe and Tadahiro Kuroda and Masato Motomura},

year  = {2016},

date = {2016-09-01},

booktitle = {European Solid-State Circuits Conference},

address = {Lausanne, Switzerland},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00161,

title = {Memory-Error Tolerance of Scalable and Highly Parallel Architecture for Restricted Boltzmann Machines in Deep Belief Network},

author = {Kodai Ueyoshi and Takao Marukame and Tetsuya Asai and Masato Motomura and Alexandre Schmid},

year  = {2016},

date = {2016-05-01},

booktitle = {IEEE International Symposium on Circuits and Systems},

address = {Montreal, Canada},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{motomura_00168,

title = {Hardware Architecture for Online Frequent Items Mining with Memory-Efficient Data Structure},

author = {Kasho Yamamoto and Tetsuya Asai and Masato Motomura},

year  = {2016},

date = {2016-04-01},

booktitle = {COOL Chips XIX},

address = {Yokohama, Japan},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{平尾優香2016ecg,

title = {ECG の可変形状モデルに基づく不整脈検出アルゴリズム (スマートインフォメディアシステム)},

author = {平尾優香 and 劉載勲 and 武内良典 and 今井正治},

year  = {2016},

date = {2016-01-01},

booktitle = {電子情報通信学会技術研究報告= IEICE technical report: 信学技報},

volume = {115},

number = {505},

pages = {25--30},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{mitsunari2016influence,

title = {Influence of Numerical Precision on Machine Learning and Embedded Systems},

author = {Koichi Mitsunari and Jaehoon Yu},

year  = {2016},

date = {2016-01-01},

booktitle = {C_SISA},

pages = {164--169},

note = {(被引用件数: 4)},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{mitsunari2016object,

title = {Object Tracking based on Path Similarity of Boosted Decision Trees},

author = {Koichi Mitsunari and Jaehoon Yu and Yoshinori Takeuchi and Masaharu Imai},

year  = {2016},

date = {2016-01-01},

pages = {563--566},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{武内良典2016心疾患発症を検出するための就寝時心電計測システムの提案,

title = {心疾患発症を検出するための就寝時心電計測システムの提案},

author = {武内良典 and 劉載勲 and 今井正治 and others},

year  = {2016},

date = {2016-01-01},

booktitle = {研究報告システム・アーキテクチャ (ARC)},

volume = {2016},

number = {37},

pages = {1--6},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{川部純2016電源ノイズ削減のためのマルチコアプロセッサ向けクロックゲーティング機構の提案,

title = {電源ノイズ削減のためのマルチコアプロセッサ向けクロックゲーティング機構の提案},

author = {川部純 and 武内良典 and 劉載勲 and 今井正治 and others},

year  = {2016},

date = {2016-01-01},

booktitle = {DA シンポジウム 2016 論文集},

volume = {2016},

number = {29},

pages = {151--156},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}

@inproceedings{hirao2016arrhythmia,

title = {Arrhythmia Detection Using a Deformable Part Model and Time Domain Features},

author = {Yuuka Hirao and Jaehoon Yu and Yoshinori Takeuchi and Masaharu Imai},

year  = {2016},

date = {2016-01-01},

pages = {94--99},

note = {(Student Best Paper Award)},

keywords = {Conference Papers},

pubstate = {published},

tppubtype = {inproceedings}

}