While deep neural networks achieve high accuracy in fields such as object recognition, it requires a large amount of computation, so dedicated hardware for efficient computation is now actively developed. With FPGA implementation, multiple systems can be loaded on a single chip, which can be expected to reduce the area and cost. It is important to know the relationship between the circuit area and inference accuracy to search for the optimum hardware configuration. However, it is necessary to appropriately assign the circuit resources such as memory and computing unit while considering the other circuit, which makes hardware search difficult. Therefore, using NNgen, a high-level synthesis compiler that generates DNN specialized hardware, we efficiently evaluated the relationship between the\u00a0circuit area and inference accuracy.<\/p>","protected":false},"excerpt":{"rendered":"
While deep neural networks achieve high accuracy in fields such as object recognition, it requires a large amount of computation, so dedicated hardware for efficient computation is now actively developed. With FPGA implementation, multiple systems can be loaded on a single chip, which can be expected to reduce the area […]<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":114,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"rop_custom_images_group":[],"rop_custom_messages_group":[],"rop_publish_now":"initial","rop_publish_now_accounts":[],"rop_publish_now_history":[],"rop_publish_now_status":"pending","_themeisle_gutenberg_block_has_review":false,"footnotes":""},"yoast_head":"\n